CMOS edge-triggered flip-flop using one latch
Wu Xiajie, Jia Wei
Abstract
Wu Xiajie, Jia Wei
Abstract
The authors use the narrow pulse produced by the race-hazard of the clock signal to control the latch, so as to meet the ‘non-transparent’ demand. Based on this principle, a novel CMOS edge-triggered flip-flop using one latch is proposed which has a simpler construction and lower power dissipation than previous flip-flops.
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The authors use the narrow pulse produced by the race-hazard of the clock signal to control the latch, so as to meet the ‘non-transparent’ demand. Based on this principle, a novel CMOS edge-triggered flip-flop using one latch is proposed which has a simpler construction and lower power dissipation than previous flip-flops.
Key concepts: Flip-flop, CMOS, Signal edge, FLOPS, Dissipation, Enhanced Data Rates for GSM Evolution, Clock signal, Electronic engineering