2004Unpublished venueRequires access

A V-band VCO and frequency divider MMICs for phased-locked loop

Ockgoo Lee, Jeong‐Geun Kim, Sanghoon Jeon, Jae‐Woo Park, Songchel Hong

Open publisher page 2 citations

Abstract

This paper presents a VCO with frequency doubler and a 1/8 frequency divider MMICs for a V-band PLL using cost effective InGaP/GaAs HBT technology. The VCO was implemented common base inductive topology with 27.5 GHz differential outputs and 55 GHz doubler output. The 1/8 frequency divider was implemented by connecting two stages of static frequency divider circuits after dynamic one. To achieve higher operating frequency, active loads are used in the dynamic frequency divider. The maximum operating frequency of the 1/8 frequency divider is higher than f/sub T//2 of transistor.

About this research paper

What this paper is about

This paper presents a VCO with frequency doubler and a 1/8 frequency divider MMICs for a V-band PLL using cost effective InGaP/GaAs HBT technology. The VCO was implemented common base inductive topology with 27.5 GHz differential outputs and 55 GHz doubler output. The 1/8 frequency divider was implemented by connecting two stages of static frequency divider circuits after dynamic one. To achieve higher operating frequency, active loads are used in the dynamic frequency divider. The maximum operating frequency of the 1/8 frequency divider is higher than f/sub T//2 of transistor.

Why it matters

OpenAlex reports 2 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

This paper presents a VCO with frequency doubler and a 1/8 frequency divider MMICs for a V-band PLL using cost effective InGaP/GaAs HBT technology. The VCO was implemented common base inductive topology with 27.5 GHz differential outputs and 55 GHz doubler output. The 1/8 frequency divider was implemented by connecting two stages of static frequency divider circuits after dynamic one. To achieve higher operating frequency, active loads are used in the dynamic frequency divider. The maximum operating frequency of the 1/8 frequency divider is higher than f/sub T//2 of transistor.

Key concepts: Frequency divider, Frequency multiplier, Voltage-controlled oscillator, Wilkinson power divider, Current divider, Electrical engineering, Monolithic microwave integrated circuit, Heterojunction bipolar transistor

Related papers

Back to paper searchBrowse research topicsOriginal source
A V-band VCO and frequency divider MMICs for phased-locked loop — Research Paper | ScholarLens