Single-Event Transient Measurements in nMOS and pMOS Transistors in a 65-nm Bulk CMOS Technology at Elevated Temperatures

In this paper, heavy-ion-induced single-event transient (SET) pulsewidths measured in a 65-nm bulk CMOS technology at temperatures ranging from 25°C to 100°C with an autonomous SET capture circuit are presented. The experimental results for the SETs induced in two different inverter chain circuits indicate an increase in the average SET pulsewidth as a function of the operating temperature. Unique SET test structures were also designed to differentiate between SETs induced in an nMOS transistor and those induced in a pMOS transistor. The SET widths induced in a pMOS transistor increase more with temperature than the SETs induced in an nMOS transistor.