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2009•IEEE Transactions on Electron DevicesRequires access

Single-Electron-Based Flexible Multivalued Exclusive-or Logic Gate

Sang-Jin Kim, Chang‐Keun Lee, R. S. Chung, Eunsil Park, Seung‐Jun Shin, Jung‐Bum Choi, Yun Seop Yu, Nam-Soo Kim, Hyung Gyoo Lee, Keun-Hyung Park

Open publisher page 27 citations

Abstract

By using two symmetrical sidewall gates, we implemented a Si-based single-electron exclusive- OR (XOR) gate and reported on the first flexible multivalued (MV) functionality. A grayscale contour plot of the output voltages displays alternating high/low values as a function of two single-electron transistor (SET) input voltages. Their voltage transfer characteristics display typical XOR or XNOR gate function depending on input voltages for binary, MV, and binary-MV mixed-modes. This flexible two-input XOR gate, combined with the previously reported NAND/NOR gates, provide three basic arithmetic blocks for the SET-based MV logic gate family.

About this research paper

What this paper is about

By using two symmetrical sidewall gates, we implemented a Si-based single-electron exclusive- OR (XOR) gate and reported on the first flexible multivalued (MV) functionality. A grayscale contour plot of the output voltages displays alternating high/low values as a function of two single-electron transistor (SET) input voltages. Their voltage transfer characteristics display typical XOR or XNOR gate function depending on input voltages for binary, MV, and binary-MV mixed-modes. This flexible two-input XOR gate, combined with the previously reported NAND/NOR gates, provide three basic arithmetic blocks for the SET-based MV logic gate family.

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OpenAlex reports 27 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

By using two symmetrical sidewall gates, we implemented a Si-based single-electron exclusive- OR (XOR) gate and reported on the first flexible multivalued (MV) functionality. A grayscale contour plot of the output voltages displays alternating high/low values as a function of two single-electron transistor (SET) input voltages. Their voltage transfer characteristics display typical XOR or XNOR gate function depending on input voltages for binary, MV, and binary-MV mixed-modes. This flexible two-input XOR gate, combined with the previously reported NAND/NOR gates, provide three basic arithmetic blocks for the SET-based MV logic gate family.

Key concepts: XNOR gate, NAND gate, XOR gate, Logic gate, Voltage, AND-OR-Invert, Transistor, Binary number

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