A new adaptive resurf concept for 20 V LDMOS without breakdown voltage degradation at high current
K. Kinoshita, Yoshimasa Kawaguchi, A. Nakagawa
Abstract
K. Kinoshita, Yoshimasa Kawaguchi, A. Nakagawa
Abstract
This paper presents a new adaptive resurf (reduced surface field) concept for 20 V LDMOS which introduces an additional resurf layer to the conventional resurf layer. The new resurf LDMOS achieves a sufficiently low on-resistance of 17.7 m/spl Omega//spl middot/mm/sup 2/ and a high static breakdown voltage of 28.0 V without significant breakdown voltage degradation under large drain current flow conditions. The device on-state breakdown voltage for a 5 V gate voltage is 21.8 V.
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This paper presents a new adaptive resurf (reduced surface field) concept for 20 V LDMOS which introduces an additional resurf layer to the conventional resurf layer. The new resurf LDMOS achieves a sufficiently low on-resistance of 17.7 m/spl Omega//spl middot/mm/sup 2/ and a high static breakdown voltage of 28.0 V without significant breakdown voltage degradation under large drain current flow conditions. The device on-state breakdown voltage for a 5 V gate voltage is 21.8 V.
Key concepts: LDMOS, Breakdown voltage, Electrical engineering, Materials science, Degradation (telecommunications), Voltage, Power MOSFET, High voltage