2006Nano LettersRequires access

Silicon Vertically Integrated Nanowire Field Effect Transistors

Joshua E. Goldberger, Allon I. Hochbaum, Rong Fan, Peidong Yang

Open publisher page 768 citations

Abstract

Silicon nanowires have received considerable attention as transistor components because they represent a facile route toward sub-100-nm single-crystalline Si features. Herein we demonstrate the direct vertical integration of Si nanowire arrays into surrounding gate field effect transistors without the need for postgrowth nanowire assembly processes. The device fabrication allows Si nanowire channel diameters to be readily reduced to the 5-nm regime. These first-generation vertically integrated nanowire field effect transistors (VINFETs) exhibit electronic properties that are comparable to other horizontal nanowire field effect transistors (FETs) and may, with further optimization, compete with advanced solid-state nanoelectronic devices.

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What this paper is about

Silicon nanowires have received considerable attention as transistor components because they represent a facile route toward sub-100-nm single-crystalline Si features. Herein we demonstrate the direct vertical integration of Si nanowire arrays into surrounding gate field effect transistors without the need for postgrowth nanowire assembly processes. The device fabrication allows Si nanowire channel diameters to be readily reduced to the 5-nm regime. These first-generation vertically integrated nanowire field effect transistors (VINFETs) exhibit electronic properties that are comparable to other horizontal nanowire field effect transistors (FETs) and may, with further optimization, compete with advanced solid-state nanoelectronic devices.

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OpenAlex reports 768 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

Silicon nanowires have received considerable attention as transistor components because they represent a facile route toward sub-100-nm single-crystalline Si features. Herein we demonstrate the direct vertical integration of Si nanowire arrays into surrounding gate field effect transistors without the need for postgrowth nanowire assembly processes. The device fabrication allows Si nanowire channel diameters to be readily reduced to the 5-nm regime. These first-generation vertically integrated nanowire field effect transistors (VINFETs) exhibit electronic properties that are comparable to other horizontal nanowire field effect transistors (FETs) and may, with further optimization, compete with advanced solid-state nanoelectronic devices.

Key concepts: Nanowire, Materials science, Transistor, Field-effect transistor, Fabrication, Silicon nanowires, Nanotechnology, Silicon

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