A single-electron-transistor logic gate family and its application - Part I: basic components for binary, multiple-valued and mixed-mode logic
Katsuhiko Degawa, Takakazu Aoki, T. Higuchi, Hiroshi Inokawa, Atsushi Takahashi
Abstract
Katsuhiko Degawa, Takakazu Aoki, T. Higuchi, Hiroshi Inokawa, Atsushi Takahashi
Abstract
This paper presents a model-based study of an SET (single-electron-transistor) logic gate family for synthesizing binary and MV (multiple-valued) logic circuits. The use of SETs combined with MOS transistors allows a compact realization of basic logic functions that exhibit periodic transfer characteristics. These basic SET logic gates are useful for implementing binary logic circuits, MV logic circuits and binary-MV-mixed logic circuits in a highly flexible manner. As an example, this paper describes the design of various parallel counters for carry-propagation-free arithmetic, where MV signals are effectively used to achieve higher functionality with lower hardware complexity.
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This paper presents a model-based study of an SET (single-electron-transistor) logic gate family for synthesizing binary and MV (multiple-valued) logic circuits. The use of SETs combined with MOS transistors allows a compact realization of basic logic functions that exhibit periodic transfer characteristics. These basic SET logic gates are useful for implementing binary logic circuits, MV logic circuits and binary-MV-mixed logic circuits in a highly flexible manner. As an example, this paper describes the design of various parallel counters for carry-propagation-free arithmetic, where MV signals are effectively used to achieve higher functionality with lower hardware complexity.
Key concepts: Pass transistor logic, Logic family, Logic gate, Diode–transistor logic, Resistor–transistor logic, AND-OR-Invert, Computer science, Sequential logic