ScholarLens Back to search
2002•Unpublished venueRequires access

Implant spacer optimization for the improvement of power MOSFETs' unclamped inductive switching (UIS) and high temperature breakdown

C. Kocon, Jun Zeng, R W Stokes

Open publisher page 16 citations

Abstract

This paper proposes an improvement to a 30 V N-Channel Power VDMOSFET's UIS and high temperature breakdown voltage capability by using a non-etched 0.0750 /spl mu/m thin oxide spacer as masking for a high dose body implant in lieu of a power industry accepted 0.3 /spl mu/m-0.5 /spl mu/m etched spacer. This thinner non-etched spacer allows for a more highly concentrated and precise body dopant distribution beneath the source region, for a given implant energy, preventing the parasitic BJT from turning on at high current densities. As a consequence the UIS and high temperature (/spl ges/150/spl deg/C) breakdown characteristics are enhanced without increasing threshold voltage or device on-resistance.

About this research paper

What this paper is about

This paper proposes an improvement to a 30 V N-Channel Power VDMOSFET's UIS and high temperature breakdown voltage capability by using a non-etched 0.0750 /spl mu/m thin oxide spacer as masking for a high dose body implant in lieu of a power industry accepted 0.3 /spl mu/m-0.5 /spl mu/m etched spacer. This thinner non-etched spacer allows for a more highly concentrated and precise body dopant distribution beneath the source region, for a given implant energy, preventing the parasitic BJT from turning on at high current densities. As a consequence the UIS and high temperature (/spl ges/150/spl deg/C) breakdown characteristics are enhanced without increasing threshold voltage or device on-resistance.

Why it matters

OpenAlex reports 16 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

This paper proposes an improvement to a 30 V N-Channel Power VDMOSFET's UIS and high temperature breakdown voltage capability by using a non-etched 0.0750 /spl mu/m thin oxide spacer as masking for a high dose body implant in lieu of a power industry accepted 0.3 /spl mu/m-0.5 /spl mu/m etched spacer. This thinner non-etched spacer allows for a more highly concentrated and precise body dopant distribution beneath the source region, for a given implant energy, preventing the parasitic BJT from turning on at high current densities. As a consequence the UIS and high temperature (/spl ges/150/spl deg/C) breakdown characteristics are enhanced without increasing threshold voltage or device on-resistance.

Key concepts: Materials science, Optoelectronics, Masking (illustration), Bipolar junction transistor, Dopant, Breakdown voltage, Voltage, Threshold voltage

Related papers

Related paper 1Related paper 2Related paper 3
Back to paper searchBrowse research topicsOriginal source
Implant spacer optimization for the improvement of power MOSFETs' unclamped inductive switching (UIS) and high temperature breakdown — Research Paper | ScholarLens