2006Unpublished venueRequires access

Linear Power Amplifier with a Modified Predistortion Compensation for NCDMA Applications

Yao‐Huang Kao, Wen‐Chang Chen

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Abstract

The selection of the matched transistor pair in a cascaded architecture for predistortion compensation is nontrivial. In this study, a modified architecture of predistortion with two paths is presented for the high power amplifier. The goal is to develop a 10W linear power amplifier with LDMOS transistor for 8 channels NCDMA repeater from 870 to 880MHz. With the modified scheme, the improvement of intermodulation is larger than 10dB and spurious is less than 50dBc.

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What this paper is about

The selection of the matched transistor pair in a cascaded architecture for predistortion compensation is nontrivial. In this study, a modified architecture of predistortion with two paths is presented for the high power amplifier. The goal is to develop a 10W linear power amplifier with LDMOS transistor for 8 channels NCDMA repeater from 870 to 880MHz. With the modified scheme, the improvement of intermodulation is larger than 10dB and spurious is less than 50dBc.

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Available abstract

The selection of the matched transistor pair in a cascaded architecture for predistortion compensation is nontrivial. In this study, a modified architecture of predistortion with two paths is presented for the high power amplifier. The goal is to develop a 10W linear power amplifier with LDMOS transistor for 8 channels NCDMA repeater from 870 to 880MHz. With the modified scheme, the improvement of intermodulation is larger than 10dB and spurious is less than 50dBc.

Key concepts: Predistortion, Amplifier, Intermodulation, Linear amplifier, Electronic engineering, Compensation (psychology), Computer science, RF power amplifier

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