PLATO-a CAD tool for logic synthesis based on decomposition
Tedeusz Luba, Jerzy Kalinowski, Krzysztof Jasiński
Abstract
Tedeusz Luba, Jerzy Kalinowski, Krzysztof Jasiński
Abstract
In this paper a CAD system for logic synthesis (PLATO system) that exploits logic decomposition to optimize the actual circuit is presented. Unlike the traditional approach, where the partitioning or decomposition follows logic minimization, decomposition process is carried out in the PLATO system as the very first step in the logic synthesis. Experimental results indicate that a significant reduction of the silicon area can be obtained using this new design strategy.
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In this paper a CAD system for logic synthesis (PLATO system) that exploits logic decomposition to optimize the actual circuit is presented. Unlike the traditional approach, where the partitioning or decomposition follows logic minimization, decomposition process is carried out in the PLATO system as the very first step in the logic synthesis. Experimental results indicate that a significant reduction of the silicon area can be obtained using this new design strategy.
Key concepts: Logic optimization, Logic synthesis, Decomposition, Logic gate, Computer science, Sequential logic, Minification, CAD