Wang Lie, Wu Feng-yan
Abstract
Dynamic partial reconfigurable FPGAs offer new design space with a variety of benefits: reduce the configuration time and save memory as the partial reconfiguration files (bitstreams) are smaller than full ones. This paper introduces a simple reconfigurable system and focuses on the advantages of the newest dynamic partial reconfiguration design flow.
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Dynamic partial reconfigurable FPGAs offer new design space with a variety of benefits: reduce the configuration time and save memory as the partial reconfiguration files (bitstreams) are smaller than full ones. This paper introduces a simple reconfigurable system and focuses on the advantages of the newest dynamic partial reconfiguration design flow.
Key concepts: Control reconfiguration, Field-programmable gate array, Computer science, Embedded system, Design flow, Simple (philosophy), Reconfigurable computing, Variety (cybernetics)