A Low-Voltage High-Performance Differential Static Logic (LVDSL) family

A new logic family, Low-Voltage Differential Static Logic (LVDSL), is proposed for portable digital signal processing (DSP) applications. This circuit technique is capable of operating at a supply voltage lower than the minimum of complementary CMOS logic. It achieves low-power consumption by an aggressively reduced supply voltage, while maintaining speeds suitable for most portable DSP applications. At a supply of 1.2 V, a LVDSL full-adder consumes 6.52/spl times/ less energy and is 5/spl times/ faster than DCVS. It also consumes 2/spl times/ less energy and is 2.2/spl times/ faster than any of the established pass-logic families.