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1989•IEEE Journal of Solid-State CircuitsRequires access

An experimental 4-Mbit CMOS EEPROM with a NAND-structured cell

M. Momodomi, Y. Itoh, R. Shirota, Y. Iwata, Ryo Nakayama, R. Kirisawa, Tomoharu Tanaka, S. Aritome, Tetsuo Endoh, K. Ohuchi, F. Masuoka

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Abstract

A 5-V-only high-density (512 K*8 bit) electrically erasable and programmable read-only memory (EEPROM) has been designed and fabricated by using a NAND-structured cell with 1.0- mu m design rules. The average cell area per bit is 12.9 mu m/sup 2/. Block erasing, successive programming, and random reading are achieved using a newly developed NAND-cell control circuit. Typical erasing time is 1.0 ms and page-programming time is 4.0 ms, equivalent to 1.0 mu s/bit. A dynamic sensing system is introduced to sense the small cell current. Typical read access time is 1.6 mu s. The die size is 10.7*15.3 mm/sup 2/.>

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What this paper is about

A 5-V-only high-density (512 K*8 bit) electrically erasable and programmable read-only memory (EEPROM) has been designed and fabricated by using a NAND-structured cell with 1.0- mu m design rules. The average cell area per bit is 12.9 mu m/sup 2/. Block erasing, successive programming, and random reading are achieved using a newly developed NAND-cell control circuit. Typical erasing time is 1.0 ms and page-programming time is 4.0 ms, equivalent to 1.0 mu s/bit. A dynamic sensing system is introduced to sense the small cell current. Typical read access time is 1.6 mu s. The die size is 10.7*15.3 mm/sup 2/.>

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Available abstract

A 5-V-only high-density (512 K*8 bit) electrically erasable and programmable read-only memory (EEPROM) has been designed and fabricated by using a NAND-structured cell with 1.0- mu m design rules. The average cell area per bit is 12.9 mu m/sup 2/. Block erasing, successive programming, and random reading are achieved using a newly developed NAND-cell control circuit. Typical erasing time is 1.0 ms and page-programming time is 4.0 ms, equivalent to 1.0 mu s/bit. A dynamic sensing system is introduced to sense the small cell current. Typical read access time is 1.6 mu s. The die size is 10.7*15.3 mm/sup 2/.>

Key concepts: EEPROM, NAND gate, EPROM, Computer hardware, CMOS, Megabit, Computer science, Bit (key)

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