CMOS image sensor using a floating diffusion driving buried photodiode
Keiji Mabuchi, Nobuo Nakamura, Eiichi Funatsu, K. Abe, T. Umeda, Tadao Hoshino, Ryoji Suzuki, Hirofumi Sumi
Abstract
Keiji Mabuchi, Nobuo Nakamura, Eiichi Funatsu, K. Abe, T. Umeda, Tadao Hoshino, Ryoji Suzuki, Hirofumi Sumi
Abstract
Two 2.5V VGA CMOS image sensors with 3.45/spl mu/m and 3.1/spl mu/m buried photodiode-pixels on a 0.25/spl mu/m 2P3M CMOS technology are described. The test chips utilize a floating diffusion driving technique to achieve 3-transistors/pixel and 2-transistors/pixel respectively, and operate at 60 frames/s with 49mW dissipation.
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Two 2.5V VGA CMOS image sensors with 3.45/spl mu/m and 3.1/spl mu/m buried photodiode-pixels on a 0.25/spl mu/m 2P3M CMOS technology are described. The test chips utilize a floating diffusion driving technique to achieve 3-transistors/pixel and 2-transistors/pixel respectively, and operate at 60 frames/s with 49mW dissipation.
Key concepts: Photodiode, Video Graphics Array, CMOS, Pixel, Image sensor, CMOS sensor, Dissipation, Transistor