Shared word line DRAM cell

A novel memory cell which has a 2-to-1 cell packaging density advantage relative to a conventional one-device (1D) dynamic RAM cell is described. In the shared word line (SWL) DRAM cell, a pair of cells is connected to the same bit sense line and word line. Unique read and write operations are accomplished by controlling the plate of the storage capacitor. The arrangement of cell pairs also provides a sense amplifier pitch of about six times the average feature size; this greatly relaxes the bit line pitch limitation on sense amplifier layout. The cell layout is fully self-aligned using a process very similar and not significantly more complex than conventional double-polysilicon processes. The cell requires neither contact holes nor metal lines. While the access time of the SWL cell is similar to a 1D cell, the cycle time is somewhat longer due to a more complex write operation.