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2010•Unpublished venueRequires access

A 3-GS/s 5-bit 36-mW flash ADC in 65-nm CMOS

Takahiro Ito, Toru Itakura

Open publisher page 20 citations

Abstract

A 3-GS/s 5-bit flash ADC is fabricated for millimeter-wave communication systems in 65nm CMOS technology. The proposed foreground calibration method reduces the input-referred DC offset, achieving the resolution of 4.7 ENOB at 200MHz input frequency and keeping more than 4.3 ENOB even at Nyquist. The ADC consumes only 36.2mW including the power of the clock buffer and the resistor ladder from 1-V supply. The ADC has the FoM of 0.6pJ/conv at Nyquist.

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What this paper is about

A 3-GS/s 5-bit flash ADC is fabricated for millimeter-wave communication systems in 65nm CMOS technology. The proposed foreground calibration method reduces the input-referred DC offset, achieving the resolution of 4.7 ENOB at 200MHz input frequency and keeping more than 4.3 ENOB even at Nyquist. The ADC consumes only 36.2mW including the power of the clock buffer and the resistor ladder from 1-V supply. The ADC has the FoM of 0.6pJ/conv at Nyquist.

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Available abstract

A 3-GS/s 5-bit flash ADC is fabricated for millimeter-wave communication systems in 65nm CMOS technology. The proposed foreground calibration method reduces the input-referred DC offset, achieving the resolution of 4.7 ENOB at 200MHz input frequency and keeping more than 4.3 ENOB even at Nyquist. The ADC consumes only 36.2mW including the power of the clock buffer and the resistor ladder from 1-V supply. The ADC has the FoM of 0.6pJ/conv at Nyquist.

Key concepts: Effective number of bits, Flash ADC, CMOS, 4-bit, Resistor, Electronic engineering, Electrical engineering, Comparator

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