Monolithic Spiral Inductors for a 0.25 ¿m Digital CMOS Process
Marc Rosales, John E. Hizon, Louis P. Alarcón, D.J.M. Sabido
Abstract
Marc Rosales, John E. Hizon, Louis P. Alarcón, D.J.M. Sabido
Abstract
The digital CMOS processes currently enjoys a continued scaling in feature sizes. This allows the the process to have transitors that are viable to be used for RF circuits. This has fueled a lot of research focused on using CMOS technology to implement RF circuits. Inductors are present in most of the RF circuit modules and oftentimes consume large areas on silicon. However, the lack of models that will accurately predict their behavior on silicon using a CMOS process presents a major limitation in the full integration of RF systems on CMOS. These inductors are characterized using an inductor model to effectively compare the merits of each implementation and to identify relevant parasitics that limit the performance of these inductors.
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The digital CMOS processes currently enjoys a continued scaling in feature sizes. This allows the the process to have transitors that are viable to be used for RF circuits. This has fueled a lot of research focused on using CMOS technology to implement RF circuits. Inductors are present in most of the RF circuit modules and oftentimes consume large areas on silicon. However, the lack of models that will accurately predict their behavior on silicon using a CMOS process presents a major limitation in the full integration of RF systems on CMOS. These inductors are characterized using an inductor model to effectively compare the merits of each implementation and to identify relevant parasitics that limit the performance of these inductors.
Key concepts: Inductor, CMOS, Parasitic extraction, Electronic engineering, Electronic circuit, Process (computing), Radio frequency, Integrated circuit