Brian C. Wadell
Abstract
In the first two apnotes we introduced zero-length models for circuit parasitics (i.e., lumped elements) and showed how you can estimate resistive and inductive parasitics. In this installment we will look at capacitive parasitics.
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In the first two apnotes we introduced zero-length models for circuit parasitics (i.e., lumped elements) and showed how you can estimate resistive and inductive parasitics. In this installment we will look at capacitive parasitics.
Key concepts: Parasitic extraction, Resistive touchscreen, Capacitive sensing, Electrical engineering, Electronic engineering, Computer science, Physics, Engineering