Impact of program/erase stress induced hole current on data retention degradation for MONOS memories
Shosuke Fujii, Ryota Fujitsuka, Katsuyuki Sekine, Haruka Kusai, Kiwamu Sakuma, Masato Koyama
Abstract
Shosuke Fujii, Ryota Fujitsuka, Katsuyuki Sekine, Haruka Kusai, Kiwamu Sakuma, Masato Koyama
Abstract
We investigate the mechanism for the data retention degradation caused by program/erase (P/E) cycling in MONOS memories, using the carrier separation measurement to identify the carrier type of Stress-Induced Leakage Current (SILC). It is thereby found that SILC is composed mainly of holes for the MONOS with less Si-rich SiN layer (hole SILC). A clear correlation is also discovered between hole SILC and interface states generated during P/E cycle. We also discuss the mechanism of the degradation by hole SILC of the data retention characteristics of MONOS devices.
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We investigate the mechanism for the data retention degradation caused by program/erase (P/E) cycling in MONOS memories, using the carrier separation measurement to identify the carrier type of Stress-Induced Leakage Current (SILC). It is thereby found that SILC is composed mainly of holes for the MONOS with less Si-rich SiN layer (hole SILC). A clear correlation is also discovered between hole SILC and interface states generated during P/E cycle. We also discuss the mechanism of the degradation by hole SILC of the data retention characteristics of MONOS devices.
Key concepts: SILC, Data retention, Degradation (telecommunications), Optoelectronics, Materials science, Stress (linguistics), MOSFET, Electrical engineering