Fast locking scheme for PLL frequency synthesiser

A phase-locked loop (PLL) with a fast-locked nonlinear phase frequency detector (PFD) is presented. Compared with the conventional discriminator-aided phase detector, the proposed fast-locked PFD can further reduce the PLL acquisition time while the loop stability remains unchanged. Moreover, the new architecture can decrease the capacitance value and the charge-pump current to 1/k of a conventional one as the loop bandwidth increases k times, thus saving substantial area and power.