2010Unpublished venueRequires access

Low temperature direct wafer to wafer bonding for 3D integration: Direct bonding, surface preparation, wafer-to-wafer alignment

G. Gaudin, G. Riou, Didier Landru, Catherine Tempesta, Ionut Radu, Mariam Sadaka, Kevin Winstel, Emily Kinser, R. Hannon

Open publisher page 18 citations

Abstract

In this paper the integration challenges related to oxide-oxide bonding for wafer-to-wafer stacking technology are discussed. Furthermore, interface defectivity, wafer-to-wafer alignment and bond strength data are presented.

About this research paper

What this paper is about

In this paper the integration challenges related to oxide-oxide bonding for wafer-to-wafer stacking technology are discussed. Furthermore, interface defectivity, wafer-to-wafer alignment and bond strength data are presented.

Why it matters

OpenAlex reports 18 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

In this paper the integration challenges related to oxide-oxide bonding for wafer-to-wafer stacking technology are discussed. Furthermore, interface defectivity, wafer-to-wafer alignment and bond strength data are presented.

Key concepts: Wafer, Wafer bonding, Die preparation, Materials science, Direct bonding, Wafer-scale integration, Wafer backgrinding, Anodic bonding

Related papers

Back to paper searchBrowse research topicsOriginal source
Low temperature direct wafer to wafer bonding for 3D integration: Direct bonding, surface preparation, wafer-to-wafer alignment — Research Paper | ScholarLens