A Magnetoelectronic Self-Checkpointing Register File

We present a design for a register file in which each bit cell contains a bit of non-volatile memory that can be used to checkpoint the bit cell's contents to protect the register file against power supply interruptions. Our design is based on the hybrid Hall effect device, a magnetoelectronic circuit element that is relatively easy to integrate with CMOS circuitry. Because the area of the non-checkpointing register file is limited by wiring tracks, adding checkpointing to the register cell only increases its size by 6%. Similarly, the performance of the checkpointing register file is very close to that of the base design, with only a 10% increase in read/write times due to increased load on the bit lines and register cell.