Ripple reduction on skipping-based regulated two-phase voltage doubler charge pump
A. Saiz-Vela, Pere Ll. Miribel‐Català, Jordi Colomer‐Farrarons, Josep Samitier
Abstract
A. Saiz-Vela, Pere Ll. Miribel‐Català, Jordi Colomer‐Farrarons, Josep Samitier
Abstract
An on-chip ripple reduction system for a regulated two-phase voltage doubler charge pump circuit is presented. Simulated results show that ripple reduction ratios up to 53% can be achieved when the designed ripple reduction solution is applied over a 5 V regulated charge pump with flying and load capacitors Cf =CL=1 µF, switching frequency fs=100 kHz, and load RL=10 kΩ.
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An on-chip ripple reduction system for a regulated two-phase voltage doubler charge pump circuit is presented. Simulated results show that ripple reduction ratios up to 53% can be achieved when the designed ripple reduction solution is applied over a 5 V regulated charge pump with flying and load capacitors Cf =CL=1 µF, switching frequency fs=100 kHz, and load RL=10 kΩ.
Key concepts: Ripple, Voltage doubler, Charge pump, Capacitor, Reduction (mathematics), Voltage reduction, Voltage, Electrical engineering