1982•IEEE Journal of Solid-State CircuitsRequires access

PLA versus bit slice: comparison for a 32 bit ALU

Ewald Soutschek, M. Pomper, Karlheinrich Horninger

Open publisher page 4 citations

Abstract

The PLA technique and the slice technique have been chosen to build a 32 bit wide ALU. Both techniques have a high degree of regularity and are used to soften the design time of complex logic circuits. In a given technology, the PLA is approximately twice as fast as the bit-slice solution (22-35 ns), but also needs more area (4.2-1 mm/SUP 2/).

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What this paper is about

The PLA technique and the slice technique have been chosen to build a 32 bit wide ALU. Both techniques have a high degree of regularity and are used to soften the design time of complex logic circuits. In a given technology, the PLA is approximately twice as fast as the bit-slice solution (22-35 ns), but also needs more area (4.2-1 mm/SUP 2/).

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Available abstract

The PLA technique and the slice technique have been chosen to build a 32 bit wide ALU. Both techniques have a high degree of regularity and are used to soften the design time of complex logic circuits. In a given technology, the PLA is approximately twice as fast as the bit-slice solution (22-35 ns), but also needs more area (4.2-1 mm/SUP 2/).

Key concepts: Bit (key), Arithmetic, 4-bit, 8-bit, 16-bit, Computer science, Wafer, Electronic circuit

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