1 GHz 100 W Internally Matched Static Induction Transistor
M. Aiga, Yukio Higaki, Masahiro Kato, Y. Kajiwara, Yoshinori Yukimoto, K. Shirahata
Abstract
M. Aiga, Yukio Higaki, Masahiro Kato, Y. Kajiwara, Yoshinori Yukimoto, K. Shirahata
Abstract
A 1 GHz lOOW transistor has been accomplished with a new silicon device, static induction transistor. A fine patterning technique brought the transistor chip to a high pawer capacity without sacrificing a power gain. An internal matching technique was employed to ensure the parallel openration of multi-celled transistor chips. As a result, at 1 GHz CW operation, a gain of 4 dB and a drain efficiency of 55 % with an output paver of 100 watts was obtained. The saturation output power, at 1 dB gain compression point, was 110 watts. This successful performance was brought by the achievement of even power sharing, which was obtained by the aids of the internal matching and a thermal stability at high current region of the static induction transistor in its nature.
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A 1 GHz lOOW transistor has been accomplished with a new silicon device, static induction transistor. A fine patterning technique brought the transistor chip to a high pawer capacity without sacrificing a power gain. An internal matching technique was employed to ensure the parallel openration of multi-celled transistor chips. As a result, at 1 GHz CW operation, a gain of 4 dB and a drain efficiency of 55 % with an output paver of 100 watts was obtained. The saturation output power, at 1 dB gain compression point, was 110 watts. This successful performance was brought by the achievement of even power sharing, which was obtained by the aids of the internal matching and a thermal stability at high current region of the static induction transistor in its nature.
Key concepts: Static induction transistor, Transistor, Materials science, Power semiconductor device, Electrical engineering, Power (physics), Optoelectronics, Voltage