Design of multioperand carry-save adders for arithmetic modulo (2 n +1)
A. Skavantzos
Abstract
A. Skavantzos
Abstract
We present the design of a multioperand adder for arithmetic modulo (2n+1). Such an adder will be using the carry-saving approach and will mainly consist of a group of full adders operating in parallel.
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We present the design of a multioperand adder for arithmetic modulo (2n+1). Such an adder will be using the carry-saving approach and will mainly consist of a group of full adders operating in parallel.
Key concepts: Adder, Arithmetic, Modulo, Carry (investment), Carry-save adder, Serial binary adder, Computer science, Mathematics