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An improved 32-bit carry-lookahead adder with Conditional Carry-Selection

Pinghua Chen, Juan Zhao, Guobo Xie, Yijun Li

Open publisher page 8 citations

Abstract

An improved 32-bit carry-lookahead adder (CLA) with conditional carry-selection (CSS) is proposed in this paper. The new adder is compared with serial adder and pure carry-lookahead adder. The three adders is simulated in FPGA circuits, the results show that the propagation time of the carry of the new 32-bit adder is reduced 26% compared with Serial Adder and 3.17% with pure Carry-Lookahead Adder.

About this research paper

What this paper is about

An improved 32-bit carry-lookahead adder (CLA) with conditional carry-selection (CSS) is proposed in this paper. The new adder is compared with serial adder and pure carry-lookahead adder. The three adders is simulated in FPGA circuits, the results show that the propagation time of the carry of the new 32-bit adder is reduced 26% compared with Serial Adder and 3.17% with pure Carry-Lookahead Adder.

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OpenAlex reports 8 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

An improved 32-bit carry-lookahead adder (CLA) with conditional carry-selection (CSS) is proposed in this paper. The new adder is compared with serial adder and pure carry-lookahead adder. The three adders is simulated in FPGA circuits, the results show that the propagation time of the carry of the new 32-bit adder is reduced 26% compared with Serial Adder and 3.17% with pure Carry-Lookahead Adder.

Key concepts: Adder, Carry (investment), Carry-save adder, Serial binary adder, Computer science, Arithmetic, Bit (key), Selection (genetic algorithm)

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