2015•Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIERequires access

Scatterometry-based metrology for the 14nm node double patterning lithography

Damien Carau, R. Bouyssou, J. Ducoté, Florent Dettoni, Alain Ostrovsky, Bertrand Le Gratiet, C. Dézauzier, M. Besacier, C. Gourgon

Open publisher page 5 citations

Abstract

Critical dimension and overlay measurements have become a key challenge in microelectronics process control, and the weight of metrology in the success of a patterning technique is increasing. For the 14 nm node, the limit of scanner resolution can be overcome by double patterning, which requires a maximum overlay variability of 3 nm between the two reticles of the first metal level. In the double patterning case of metal layers, critical dimension of line spaces and overlay are no longer independent. In this paper, the possibility of a common measurement after the second lithography is studied. Scatterometry has been used to fit successfully the critical dimension of the two sublevels. As sensitivity to overlay is too low in device-like target, a strategy has been implemented from diffraction-based overlay measurement. So it becomes possible to provide information on the lithography step quality before the second etch process to enable rework if necessary. Finally a scatterometry target has been designed to fit simultaneously the two critical dimensions and overlay. This target, which is designed to maximize overlay sensitivity, has been placed in the next 14 nm CMOS product and is expected to make this scatterometry method even more attractive.

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What this paper is about

Critical dimension and overlay measurements have become a key challenge in microelectronics process control, and the weight of metrology in the success of a patterning technique is increasing. For the 14 nm node, the limit of scanner resolution can be overcome by double patterning, which requires a maximum overlay variability of 3 nm between the two reticles of the first metal level. In the double patterning case of metal layers, critical dimension of line spaces and overlay are no longer independent. In this paper, the possibility of a common measurement after the second lithography is studied. Scatterometry has been used to fit successfully the critical dimension of the two sublevels. As sensitivity to overlay is too low in device-like target, a strategy has been implemented from diffraction-based overlay measurement. So it becomes possible to provide information on the lithography step quality before the second etch process to enable rework if necessary. Finally a scatterometry target has been designed to fit simultaneously the two critical dimensions and overlay. This target, which is designed to maximize overlay sensitivity, has been placed in the next 14 nm CMOS product and is expected to make this scatterometry method even more attractive.

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Available abstract

Critical dimension and overlay measurements have become a key challenge in microelectronics process control, and the weight of metrology in the success of a patterning technique is increasing. For the 14 nm node, the limit of scanner resolution can be overcome by double patterning, which requires a maximum overlay variability of 3 nm between the two reticles of the first metal level. In the double patterning case of metal layers, critical dimension of line spaces and overlay are no longer independent. In this paper, the possibility of a common measurement after the second lithography is studied. Scatterometry has been used to fit successfully the critical dimension of the two sublevels. As sensitivity to overlay is too low in device-like target, a strategy has been implemented from diffraction-based overlay measurement. So it becomes possible to provide information on the lithography step quality before the second etch process to enable rework if necessary. Finally a scatterometry target has been designed to fit simultaneously the two critical dimensions and overlay. This target, which is designed to maximize overlay sensitivity, has been placed in the next 14 nm CMOS product and is expected to make this scatterometry method even more attractive.

Key concepts: Reticle, Critical dimension, Overlay, Metrology, Lithography, Multiple patterning, Extreme ultraviolet lithography, Microelectronics

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