Aspects of memory hierarchy concepts extended to microcode-store level

The high speed buffer or cache type of memory hierarchy is a widely used technique to provide an effective memory access speed up in the main memory of a computer system. The paper reviews the potential of extending cache techniques to the control memory level of a computer. A brief introductory review is made of microprogramming and cache techniques before discussing control-store cache applications and the advantages that should be made possible by the use of a hierarchial writeable control-store technique. So far, little quantitative measurement has been made of this type of memory hierarchy, and mention is made of work currently in progress to provide some of the information necessary to design such systems.