1976IEEE Journal of Solid-State CircuitsRequires access

The behavior of the continuously charge-coupled random-access memory (C/SUP 3/RAM)

Karel Hoffmann

Open publisher page 6 citations

Abstract

This paper describes a new random-access memory which achieves a bit density comparable to CCD memories. This memory uses as storage elements single-transistor memory cells which are connected to a common bit line. The bit line is implemented with an MOS transmission line, which makes possible an almost lossless charge transport from the single-transistor memory cell to the read/write amplifier. Due to the almost lossless charge transport, the storage capacitance can be reduced and the bit density increased. The expected performance of a 32-kbit memory has been derived.

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What this paper is about

This paper describes a new random-access memory which achieves a bit density comparable to CCD memories. This memory uses as storage elements single-transistor memory cells which are connected to a common bit line. The bit line is implemented with an MOS transmission line, which makes possible an almost lossless charge transport from the single-transistor memory cell to the read/write amplifier. Due to the almost lossless charge transport, the storage capacitance can be reduced and the bit density increased. The expected performance of a 32-kbit memory has been derived.

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Available abstract

This paper describes a new random-access memory which achieves a bit density comparable to CCD memories. This memory uses as storage elements single-transistor memory cells which are connected to a common bit line. The bit line is implemented with an MOS transmission line, which makes possible an almost lossless charge transport from the single-transistor memory cell to the read/write amplifier. Due to the almost lossless charge transport, the storage capacitance can be reduced and the bit density increased. The expected performance of a 32-kbit memory has been derived.

Key concepts: Sense amplifier, Lossless compression, Memory refresh, Transistor, Memory cell, Semiconductor memory, Dynamic random-access memory, Capacitance

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