Reconfigurable logic design case
F. Shing-Fat, J.P. Knight, Calvin Plett
Abstract
F. Shing-Fat, J.P. Knight, Calvin Plett
Abstract
This design case identifies generalizable features of a course-grained reconfigurable FPGA, Chameleon's reconfigurable platform. An FFT is used to identify typical design practices, problems, and solutions in targeting such a platform. This paper focuses on datapath mapping, separating it into functional design and placement of reconfigurable resources. In addition to exploring the design methodology, it analyzes numerical artifacts, demonstrates efficient packing of the data path, and highlights differences from ASIC design.
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This design case identifies generalizable features of a course-grained reconfigurable FPGA, Chameleon's reconfigurable platform. An FFT is used to identify typical design practices, problems, and solutions in targeting such a platform. This paper focuses on datapath mapping, separating it into functional design and placement of reconfigurable resources. In addition to exploring the design methodology, it analyzes numerical artifacts, demonstrates efficient packing of the data path, and highlights differences from ASIC design.
Key concepts: Datapath, Field-programmable gate array, Computer architecture, Application-specific integrated circuit, Computer science, Logic synthesis, Reconfigurable computing, Path (computing)