ReEP: A Toolset for Generation and Programming of Reconfigurable Datapaths for Event Processing
Philip Gottschling, Christian Hochberger
Abstract
Philip Gottschling, Christian Hochberger
Abstract
Reconfigurable datapaths can be used to implement multiple applications on the same hardware. Switching between applications can be realized by loading new configuration information into the datapath. In this contribution, we want to use such datapaths for high frequency event processing. We have developed the toolset ReEP, which takes multiple problem descriptions and superposes them into one reconfigurable datapath. This generalized datapath can be synthesized and programmed onto an FPGA, but could as well be used on an ASIC. By loading a configuration into the datapath it is turned into a problem specific datapath. ReEP is further able to map arbitrary problems to such pre-synthesized datapaths - given that all required resources are available - and calculates a configuration for the given problem. The necessary time for mapping, creating a configuration and downloading it to the reconfigurable datapath is orders of magnitude faster than dynamic partial reconfiguration.
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Reconfigurable datapaths can be used to implement multiple applications on the same hardware. Switching between applications can be realized by loading new configuration information into the datapath. In this contribution, we want to use such datapaths for high frequency event processing. We have developed the toolset ReEP, which takes multiple problem descriptions and superposes them into one reconfigurable datapath. This generalized datapath can be synthesized and programmed onto an FPGA, but could as well be used on an ASIC. By loading a configuration into the datapath it is turned into a problem specific datapath. ReEP is further able to map arbitrary problems to such pre-synthesized datapaths - given that all required resources are available - and calculates a configuration for the given problem. The necessary time for mapping, creating a configuration and downloading it to the reconfigurable datapath is orders of magnitude faster than dynamic partial reconfiguration.
Key concepts: Datapath, Control reconfiguration, Computer science, Field-programmable gate array, Application-specific integrated circuit, Reconfigurable computing, Computer architecture, Parallel computing