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Engineering software-more logic synthesis for ASICs

M.J.S. Smith

Open publisher page 6 citations

Abstract

Computer-aided design (CAD) tools that reduce application-specific integrated circuit (ASIC) development time are examined. The use of hardware description languages to ease the data entry tasks of ASIC designers is discussed. Coupling logic synthesis tools to layout tools is considered. Limitations of logic synthesis are addressed, and some features of intelligent synthesis tools are described.>

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What this paper is about

Computer-aided design (CAD) tools that reduce application-specific integrated circuit (ASIC) development time are examined. The use of hardware description languages to ease the data entry tasks of ASIC designers is discussed. Coupling logic synthesis tools to layout tools is considered. Limitations of logic synthesis are addressed, and some features of intelligent synthesis tools are described.>

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OpenAlex reports 6 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

Computer-aided design (CAD) tools that reduce application-specific integrated circuit (ASIC) development time are examined. The use of hardware description languages to ease the data entry tasks of ASIC designers is discussed. Coupling logic synthesis tools to layout tools is considered. Limitations of logic synthesis are addressed, and some features of intelligent synthesis tools are described.>

Key concepts: Application-specific integrated circuit, Computer science, Logic synthesis, Register-transfer level, Software engineering, Software, Computer Aided Design, Computer architecture

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