A quantitative model for the conduction in oxides thermally grown from polycrystalline silicon

Oxides thermally grown from polycrystalline silicon are known to conduct much higher currents than oxides grown on monocrystalline material, which has led to their application in floating-gate electrically erasable programmable READ-only memories (EEPROM) devices (so-called textured devices) for the purpose of electrical programming and erasing of the memory device. This increased conductivity has been previously explained qualitatively by field enhancement due to the surface roughness of the polysilicon-polyoxide interfaces, but a quantitative model that could explain and predict the true injection current behavior was never proposed. In this paper, a new model is introduced, which is able to explain all of the experimental observations of conduction in polyoxides, including trapping phenomena. The new model is verified by comparison with two types of capacitor measurements. Since electron trapping in the oxide is included in the model it can also be used to investigate the degradation behavior of the textured-type floating-gate EEPROM cells. In all cases it is found that the nonuniformity of the polyoxide current strongly influences its behavior and that more specifically for EEPROM devices this nonuniformity puts severe limits on the number of program ERASE cycles that are possible.