2010Electronics LettersRequires access

Self-tracking charge pump for fast-locking PLL

Yong Chen, Pui‐In Mak, Yumei Zhou

Open publisher page 14 citations

Abstract

Presented is a self-tracking charge pump (ST-CP) that can deliver a non-constant current over the output voltage range for a fast-locking phase-locked loop (PLL). It features a simple self-bias self-tracking architecture that can reduce, simultaneously, the PLL locking time and the current mismatch in charge and discharge phases. Experimentally verified in a 0.18 µm CMOS process, the proposed ST-CP achieves 72% reduction of PLL locking time compared with the conventional one. The core occupies 30 × 60 µm2 and draws 10 µA at 1.8 V.

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What this paper is about

Presented is a self-tracking charge pump (ST-CP) that can deliver a non-constant current over the output voltage range for a fast-locking phase-locked loop (PLL). It features a simple self-bias self-tracking architecture that can reduce, simultaneously, the PLL locking time and the current mismatch in charge and discharge phases. Experimentally verified in a 0.18 µm CMOS process, the proposed ST-CP achieves 72% reduction of PLL locking time compared with the conventional one. The core occupies 30 × 60 µm2 and draws 10 µA at 1.8 V.

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Available abstract

Presented is a self-tracking charge pump (ST-CP) that can deliver a non-constant current over the output voltage range for a fast-locking phase-locked loop (PLL). It features a simple self-bias self-tracking architecture that can reduce, simultaneously, the PLL locking time and the current mismatch in charge and discharge phases. Experimentally verified in a 0.18 µm CMOS process, the proposed ST-CP achieves 72% reduction of PLL locking time compared with the conventional one. The core occupies 30 × 60 µm2 and draws 10 µA at 1.8 V.

Key concepts: Phase-locked loop, Charge pump, CMOS, PLL multibit, Voltage, Tracking (education), Loop (graph theory), Materials science

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