2011•Unpublished venueRequires access

A CMOS single stage fully differential folded cascode amplifier employing gain boosting technique

Siti Amalina Enche Ab Rahim, I. Mohd Azmi

Open publisher page 18 citations

Abstract

In this paper, a single stage fully differential folded cascode amplifier using gain boosting technique is presented. The amplifier was initially designed for 12 bits 22 MSPS pipelined analog-to-digital converter (ADC). However, the amplifier alone could not provide a sufficient DC gain in order to meet the ADC requirement. In order to obtain higher DC gain, a gain boosting technique was employed for this op-amp. The amplifier was implemented in 0.13μm CMOS process technology. The simulation results show that this amplifier has a DC gain of 95dB, a unity gain bandwidth of 414 MHz and a phase margin of 82 degrees.

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What this paper is about

In this paper, a single stage fully differential folded cascode amplifier using gain boosting technique is presented. The amplifier was initially designed for 12 bits 22 MSPS pipelined analog-to-digital converter (ADC). However, the amplifier alone could not provide a sufficient DC gain in order to meet the ADC requirement. In order to obtain higher DC gain, a gain boosting technique was employed for this op-amp. The amplifier was implemented in 0.13μm CMOS process technology. The simulation results show that this amplifier has a DC gain of 95dB, a unity gain bandwidth of 414 MHz and a phase margin of 82 degrees.

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OpenAlex reports 18 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

In this paper, a single stage fully differential folded cascode amplifier using gain boosting technique is presented. The amplifier was initially designed for 12 bits 22 MSPS pipelined analog-to-digital converter (ADC). However, the amplifier alone could not provide a sufficient DC gain in order to meet the ADC requirement. In order to obtain higher DC gain, a gain boosting technique was employed for this op-amp. The amplifier was implemented in 0.13μm CMOS process technology. The simulation results show that this amplifier has a DC gain of 95dB, a unity gain bandwidth of 414 MHz and a phase margin of 82 degrees.

Key concepts: Fully differential amplifier, Phase margin, Cascode, Direct-coupled amplifier, Operational amplifier, Open-loop gain, Operational transconductance amplifier, Electronic engineering

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