Reducing the logic-level of combinational circuits
Xianjun Zeng, Mingyan Yu, Yan Zhang, Yizheng Ye
Abstract
Xianjun Zeng, Mingyan Yu, Yan Zhang, Yizheng Ye
Abstract
The Boolean function factoring method with the objective of logic-level minimization is discussed in this paper. An optimization algorithm for combinational logic circuits is proposed based on Lawler's clustering algorithm and sublogic structural transformation.
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The Boolean function factoring method with the objective of logic-level minimization is discussed in this paper. An optimization algorithm for combinational logic circuits is proposed based on Lawler's clustering algorithm and sublogic structural transformation.
Key concepts: Combinational logic, Logic optimization, Sequential logic, Logic synthesis, Computer science, Boolean circuit, Logic gate, Boolean function