2004•Unpublished venueRequires access

A CMOS multi-standard receiver architecture for ISM and UNII band applications

Ho-Kwon Yoon, M. Ismail

Open publisher page 9 citations

Abstract

Various wireless communication standards have been introduced and multi-standard wireless devices are highly in demand to accommodate different wireless communication standards. Due to the different frequency bands and bandwidths, existing multi-standard wireless devices use separate chipsets or separate signal paths for the different standards on the same chip. Low and Zero-IF receiver architectures with high integration and high level of component share are proposed for Bluetooth and WLAN applications. The overall system requirements are analyzed and the design specifications for individual receiver components are determined using Simulink models. The system design targets implementation in deep submicron CMOS technology, e.g. 0.18 /spl mu/m process.

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What this paper is about

Various wireless communication standards have been introduced and multi-standard wireless devices are highly in demand to accommodate different wireless communication standards. Due to the different frequency bands and bandwidths, existing multi-standard wireless devices use separate chipsets or separate signal paths for the different standards on the same chip. Low and Zero-IF receiver architectures with high integration and high level of component share are proposed for Bluetooth and WLAN applications. The overall system requirements are analyzed and the design specifications for individual receiver components are determined using Simulink models. The system design targets implementation in deep submicron CMOS technology, e.g. 0.18 /spl mu/m process.

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Available abstract

Various wireless communication standards have been introduced and multi-standard wireless devices are highly in demand to accommodate different wireless communication standards. Due to the different frequency bands and bandwidths, existing multi-standard wireless devices use separate chipsets or separate signal paths for the different standards on the same chip. Low and Zero-IF receiver architectures with high integration and high level of component share are proposed for Bluetooth and WLAN applications. The overall system requirements are analyzed and the design specifications for individual receiver components are determined using Simulink models. The system design targets implementation in deep submicron CMOS technology, e.g. 0.18 /spl mu/m process.

Key concepts: Chipset, ISM band, Bluetooth, Wireless, CMOS, Computer science, Transmitter, Embedded system

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