Towards a guided design flow for heterogeneous reconfigurable architectures
Timm Bostelmann, Sergei Sawitzki
Abstract
Timm Bostelmann, Sergei Sawitzki
Abstract
In this work we present a concept of an architecture design flow for heterogeneous reconfigurable architectures. We have a special focus on high flexibility regarding the architecture design. We cover architectures from fine-grained island-style FPGAs and heterogeneous hierarchical structures through to coarse-grained reconfigurable architectures (CGRAs). Our goal is to make the development and optimization of reconfigurable architectures more efficient and convenient. Therefore our design flow includes a graphical architecture editor, which allows the user to adapt the global design structure as well as the detailed implementation of the logic blocks. An analysis tool gives the user a statistical feedback about the resource utilization of the architecture under development for a given set of benchmark applications to allow a directed exploration and optimization. We describe the envisioned design flow and compare it to a manual design flow. Finally we present the parts of the toolset that are already operational and describe how we are planning to implement the remaining tools.
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In this work we present a concept of an architecture design flow for heterogeneous reconfigurable architectures. We have a special focus on high flexibility regarding the architecture design. We cover architectures from fine-grained island-style FPGAs and heterogeneous hierarchical structures through to coarse-grained reconfigurable architectures (CGRAs). Our goal is to make the development and optimization of reconfigurable architectures more efficient and convenient. Therefore our design flow includes a graphical architecture editor, which allows the user to adapt the global design structure as well as the detailed implementation of the logic blocks. An analysis tool gives the user a statistical feedback about the resource utilization of the architecture under development for a given set of benchmark applications to allow a directed exploration and optimization. We describe the envisioned design flow and compare it to a manual design flow. Finally we present the parts of the toolset that are already operational and describe how we are planning to implement the remaining tools.
Key concepts: Computer science, Computer architecture, Design flow, Flexibility (engineering), Benchmark (surveying), Field-programmable gate array, Architecture, Logic synthesis