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Non-scan design for testability based on fault oriented conflict analysis

Dong Xiang, Shan Gu, Hideo Fujiwara

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Abstract

A two stage non-scan design for testability method is proposed. The first stage selects test points based on an earlier testability measure conflict. A new testability measure conflict+ based on conflict analysis of hard-faults in the process of test generation is introduced, which emulates most general features of sequential ATPG. A new design for testability algorithm is proposed to select test points by using conflict+. Test points are selected in the second stage based on the hard faults after the initial ATPG run of the design for testability circuit in the preliminary stage. Effective approximation schemes are adopted to get reasonable estimation of the testability measure. Several effective techniques are adopted to accelerate the process of the proposed design for testability algorithm.

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What this paper is about

A two stage non-scan design for testability method is proposed. The first stage selects test points based on an earlier testability measure conflict. A new testability measure conflict+ based on conflict analysis of hard-faults in the process of test generation is introduced, which emulates most general features of sequential ATPG. A new design for testability algorithm is proposed to select test points by using conflict+. Test points are selected in the second stage based on the hard faults after the initial ATPG run of the design for testability circuit in the preliminary stage. Effective approximation schemes are adopted to get reasonable estimation of the testability measure. Several effective techniques are adopted to accelerate the process of the proposed design for testability algorithm.

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Available abstract

A two stage non-scan design for testability method is proposed. The first stage selects test points based on an earlier testability measure conflict. A new testability measure conflict+ based on conflict analysis of hard-faults in the process of test generation is introduced, which emulates most general features of sequential ATPG. A new design for testability algorithm is proposed to select test points by using conflict+. Test points are selected in the second stage based on the hard faults after the initial ATPG run of the design for testability circuit in the preliminary stage. Effective approximation schemes are adopted to get reasonable estimation of the testability measure. Several effective techniques are adopted to accelerate the process of the proposed design for testability algorithm.

Key concepts: Testability, Automatic test pattern generation, Design for testing, Computer science, Fault coverage, Measure (data warehouse), Reliability engineering, Process (computing)

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