Testability Measures Considering Circuit Reconvergence to Reduce ATPG Runtime
Kai-Hsun Chen, Ching-Yuan Chen, Jiun-Lang Huang
Abstract
Kai-Hsun Chen, Ching-Yuan Chen, Jiun-Lang Huang
Abstract
Reconvergence has been recognized as the main reason for ATPG backtrack. It induces not only more, but also prolonged backtracks and causes more severe performance degradation than expected. In this paper, we propose a reconvergence-aware testability measure to better guide the ATPG justification process. Experiment results show that the proposed method significantly decreases the ATPG runtime, especially for circuits with deep logic level, by up to 76%.
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Reconvergence has been recognized as the main reason for ATPG backtrack. It induces not only more, but also prolonged backtracks and causes more severe performance degradation than expected. In this paper, we propose a reconvergence-aware testability measure to better guide the ATPG justification process. Experiment results show that the proposed method significantly decreases the ATPG runtime, especially for circuits with deep logic level, by up to 76%.
Key concepts: Testability, Automatic test pattern generation, Computer science, Design for testing, Process (computing), Combinational logic, Sequential logic, Parallel computing