Advances in Resistive Switching Memories Based on Graphene Oxide

Memory devices are a prerequisite for today’s information technology. In general, two dif‐ ferent segments can be distinguished. Random access type memories are based on semicon‐ ductor technology. These can be divided into static random access memories (SRAM) and dynamic random access memories (DRAM). In the following, only DRAM will be consid‐ ered, because it is the main RAM technology for standalone memory products. Mass storage devices are traditionally based on magneticand optical storage. But also here semiconduc‐ tor memories are gaining market share. The importance of semiconductor memories is con‐ sequently increasing (Mikolajick et al., 2009). Though SRAM and DRAM are very fast, both of them are volatile, which is a huge disadvantage, costing energy and additional periphery circuitry. Si-based Flash memory devices represent the most prominent nonvolatile data memory (NVM) because of their high density and low fabrication costs. However, Flash suf‐ fers from low endurance, low write speed, and high voltages required for the write opera‐ tions. In addition, further scaling, i.e., a continuation in increasing the density of Flash is expected to run into physical limits in the near future. Ferroelectric random access memory (FeRAM) and magnetoresistive random access memory (MRAM) cover niche markets for special applications. One reason among several others is that FeRAM as well as convention‐ al MRAM exhibit technological and inherent problems in the scalability, i.e., in achieving the same density as Flash today. In this circumstance, a renewed nonvolatile memory concept called resistance-switching random access memory (RRAM), which is based on resistance change modulated by electrical stimulus, has recently inspired scientific and commercial in‐ terests due to its high operation speed, high scalability, and multibit storage potential (Beck et al., 2000; Lu & Lieber, 2007; Dong et al., 2008). The reading of resistance states is nondes‐ tructive, and the memory devices can be operated without transistors in every cell (Lee et