Dynamic logic families for complementary gallium arsenide (CGaAs) fabrication processes

Different Complementary Gallium Arsenide (CGaAs) dynamic logic circuits have been designed, simulated and implemented. The circuits include Domino, N-P Domino, and Two-Phase Dynamic FET Logic (TPDL). These circuits are investigated and compared against complementary static logic for speed, power consumption and layout area. TPDL circuits are the fastest (function properly up to 2.38 GHz) and have the lowest power consumption ever reported in this technology (0.01 /spl mu/W/MHz/gate). Moreover, TPDL circuits are self latching and well suited for pipelined architectures.