2005•Unpublished venueRequires access

Hardware/software codesign for embedded signal processing

Yin‐Tsung Hwang, Jer-Sho Hwang, Yuan-Hung Wang

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Abstract

In this paper, we first propose a target board architecture suitable for rapid prototyping of various embedded applications. The target board is designed to be a PC plug-in card which contains a TI C30 DSP processor and up to four Xilinx XC5204 FPGAs for the hardware/software codesign. We next define the interface and communication protocols between the hardware and software sections. Finally, a HW/SW codesign environment which takes VHDL specification and partitions the design on the VHDL sub-program level is described. The partitioned designs will be augmented with the defined communication interface. High level synthesis and parallel DSP code generation are next employed to realize the realize the respective designs.

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What this paper is about

In this paper, we first propose a target board architecture suitable for rapid prototyping of various embedded applications. The target board is designed to be a PC plug-in card which contains a TI C30 DSP processor and up to four Xilinx XC5204 FPGAs for the hardware/software codesign. We next define the interface and communication protocols between the hardware and software sections. Finally, a HW/SW codesign environment which takes VHDL specification and partitions the design on the VHDL sub-program level is described. The partitioned designs will be augmented with the defined communication interface. High level synthesis and parallel DSP code generation are next employed to realize the realize the respective designs.

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Available abstract

In this paper, we first propose a target board architecture suitable for rapid prototyping of various embedded applications. The target board is designed to be a PC plug-in card which contains a TI C30 DSP processor and up to four Xilinx XC5204 FPGAs for the hardware/software codesign. We next define the interface and communication protocols between the hardware and software sections. Finally, a HW/SW codesign environment which takes VHDL specification and partitions the design on the VHDL sub-program level is described. The partitioned designs will be augmented with the defined communication interface. High level synthesis and parallel DSP code generation are next employed to realize the realize the respective designs.

Key concepts: Computer science, VHDL, Embedded system, Field-programmable gate array, Software, Digital signal processing, Computer architecture, Interface (matter)

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