A 10Gb/s fully differential CMOS transimpedance preamplifier
R. Tao, Manfred Berroth
Abstract
R. Tao, Manfred Berroth
Abstract
A high speed, low noise fully differential transimpedance amplifier has been designed and implemented in 0.18 /spl mu/m standard digital CMOS technology. The parallel feedback circuit topology is adopted to broaden the bandwidth. This preamplifier has a power gain S21 of 22 dB with the bandwidth of 6GHz, and can operate at 10 Gb/s with dynamic range from 2.5/spl mu/A up to 2.5 mA. The power consumption is only 88 mW.
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A high speed, low noise fully differential transimpedance amplifier has been designed and implemented in 0.18 /spl mu/m standard digital CMOS technology. The parallel feedback circuit topology is adopted to broaden the bandwidth. This preamplifier has a power gain S21 of 22 dB with the bandwidth of 6GHz, and can operate at 10 Gb/s with dynamic range from 2.5/spl mu/A up to 2.5 mA. The power consumption is only 88 mW.
Key concepts: Transimpedance amplifier, Preamplifier, CMOS, Bandwidth (computing), Dynamic range, Differential amplifier, Electrical engineering, Power consumption