1985•Unpublished venueRequires access
A 5V-0nly 256K CMOS EEPROM using Barrier Height Lowering Technique
Jun-ichi Tsujimotq, Junichi Miyamoto, N. Matsukawa, K. Shinada, S. Morita, Hiroshi Nozawa, Tetsuya Iizuka
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Abstract
A 256k (32k × 8b) 5V-only EEPROM with high-density structure cell has been developed. The EEPROM, offering typically 150ns address access time, 80mW active, and 1μW standby power dissipation, was successfully fabricated by a single-polysilicon and single metal CMOS process with a 1.2 μm photo lithography.