Hardware Co-Simulation of QPSK Modulation and Demodulation in Presence of AWG Noise on FPGA

Now a days the application of FPGAs (Field programmable gate array) became an important issue in designing electronic systems. Also, the flexibility and performance offered by reconfigurable computing shorts the development time required for implementing DSP solutions using FPGAs. This paper presents the theoretical information about a QPSK Modulation and demodulation. The QPSK Modem is then simulated using Mat lab / Simulink environment and System Generator. System Generator is a tool from Xilinx ISE used for FPGA design which is used to implement the design on a Spartan 3E Starter Kit board in order to verify the functionality of the systems in hardware which speeds up the simulations. The modem algorithm has been implemented on FPGA using the VHDL language on Xilinx ISE 10.1. The local clock oscillator of the board is 50 MHz The system has been designed and simulated and its performances were evaluated by measurements.