2023Unpublished venueRequires access

Carrier-Based Minimum-Loss Discontinuous PWM for Three-Level Inverters

Hyeon-Sik Kim, Hyung-June Cho, Seung‐Ki Sul

Open publisher page 2 citations

Abstract

This paper analyzes the possible zero clamping region of a three-level inverter to reduce switching loss and how to select positive, negative, and zero clamping in discontinuous PWM (DPWM). Based on these analyses, carrier-based minimum-loss DPWM (MLDPWM) is proposed for the three-level inverters within all ranges of power factor angle and high modulation index. Under consideration of not only positive and negative clamping but also zero clamping, the proposed method could increase the clamping region furthermore in the vicinity of a peak current at a lower power factor and higher modulation index. Thus, the switching loss can be minimized by reducing the number of switching near the peak current even under low power factor operation. The performance of the proposed method is compared with that of the conventional DPWM method in the aspect of switching loss function (SLF). Lastly, the effectiveness of the proposed method is verified by simulation and experimental results.

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What this paper is about

This paper analyzes the possible zero clamping region of a three-level inverter to reduce switching loss and how to select positive, negative, and zero clamping in discontinuous PWM (DPWM). Based on these analyses, carrier-based minimum-loss DPWM (MLDPWM) is proposed for the three-level inverters within all ranges of power factor angle and high modulation index. Under consideration of not only positive and negative clamping but also zero clamping, the proposed method could increase the clamping region furthermore in the vicinity of a peak current at a lower power factor and higher modulation index. Thus, the switching loss can be minimized by reducing the number of switching near the peak current even under low power factor operation. The performance of the proposed method is compared with that of the conventional DPWM method in the aspect of switching loss function (SLF). Lastly, the effectiveness of the proposed method is verified by simulation and experimental results.

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Available abstract

This paper analyzes the possible zero clamping region of a three-level inverter to reduce switching loss and how to select positive, negative, and zero clamping in discontinuous PWM (DPWM). Based on these analyses, carrier-based minimum-loss DPWM (MLDPWM) is proposed for the three-level inverters within all ranges of power factor angle and high modulation index. Under consideration of not only positive and negative clamping but also zero clamping, the proposed method could increase the clamping region furthermore in the vicinity of a peak current at a lower power factor and higher modulation index. Thus, the switching loss can be minimized by reducing the number of switching near the peak current even under low power factor operation. The performance of the proposed method is compared with that of the conventional DPWM method in the aspect of switching loss function (SLF). Lastly, the effectiveness of the proposed method is verified by simulation and experimental results.

Key concepts: Clamping, Modulation index, Pulse-width modulation, Inverter, Control theory (sociology), Modulation (music), Power (physics), Power factor

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