Accelerating the Task Activation and Data Communication for Dataflow Computing

The hybrid dataflow/von-Neumann [1] architectures may differ in implementations but all follow similar principles: they harness the parallelism and data synchronization inherent to the dataflow model, yet maintain the programmability of the von-Neumann model. In this paper, we raise a new kind of hybrid dataflow/von-Neumann architectures, which contains TAU (Task Activated Unit) and SPM [9] (scratchpad memory) components, by which we can enhance parallel efficiency. We also implement the prototype design, integrated with peripheral devices and verify the whole system on FPGA. Finally, we deploy operating system on the hardware system and profile the performance. The experimental results show that the performance is improved by 3.07%∼10.32% under the random data flow graph, the performance of inter-core communication is improved by 4% and the hardware acceleration effect is achieved.