2022•2022 IEEE 9th Electronics System-Integration Technology Conference (ESTC)Requires access

Thermal and Thermomechanical Investigations of Power Semiconductor Pre-Packages

Niko Pavliček, Chunlei Liu, Usama Qayyum

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Abstract

Embedding power semiconductor devices in prepackages facilitates low-inductive power semiconductor module designs with superior thermal performance and reliability. As thermal, electrical, and mechanical material properties must be considered, the design of power semiconductor packages is a multi-objective optimization problem. On the one hand, thermomechanical stress formation due to differences in the coefficients of thermal expansion of components must be minimized to achieve long lifetimes. On the other hand, the thermal resistance between junction and coolant must be minimized to efficiently cool the semiconductor devices during operation. We present a parametric study of pre-package designs considering both thermal and mechanical properties. Our study builds up on previous investigations in which we have demonstrated how patterning and CTE-matching of contacts can efficiently reduce thermomechanical stresses in power semiconductor pre-packages. In this work, we also consider the heat transfer from junction to coolant in single- and double-side cooled variants of power semiconductor module based on prepackaged SiC MOSFETs.

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What this paper is about

Embedding power semiconductor devices in prepackages facilitates low-inductive power semiconductor module designs with superior thermal performance and reliability. As thermal, electrical, and mechanical material properties must be considered, the design of power semiconductor packages is a multi-objective optimization problem. On the one hand, thermomechanical stress formation due to differences in the coefficients of thermal expansion of components must be minimized to achieve long lifetimes. On the other hand, the thermal resistance between junction and coolant must be minimized to efficiently cool the semiconductor devices during operation. We present a parametric study of pre-package designs considering both thermal and mechanical properties. Our study builds up on previous investigations in which we have demonstrated how patterning and CTE-matching of contacts can efficiently reduce thermomechanical stresses in power semiconductor pre-packages. In this work, we also consider the heat transfer from junction to coolant in single- and double-side cooled variants of power semiconductor module based on prepackaged SiC MOSFETs.

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Available abstract

Embedding power semiconductor devices in prepackages facilitates low-inductive power semiconductor module designs with superior thermal performance and reliability. As thermal, electrical, and mechanical material properties must be considered, the design of power semiconductor packages is a multi-objective optimization problem. On the one hand, thermomechanical stress formation due to differences in the coefficients of thermal expansion of components must be minimized to achieve long lifetimes. On the other hand, the thermal resistance between junction and coolant must be minimized to efficiently cool the semiconductor devices during operation. We present a parametric study of pre-package designs considering both thermal and mechanical properties. Our study builds up on previous investigations in which we have demonstrated how patterning and CTE-matching of contacts can efficiently reduce thermomechanical stresses in power semiconductor pre-packages. In this work, we also consider the heat transfer from junction to coolant in single- and double-side cooled variants of power semiconductor module based on prepackaged SiC MOSFETs.

Key concepts: Junction temperature, Materials science, Semiconductor device, Power semiconductor device, Coolant, Semiconductor, Thermal resistance, Power module

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